This invention relates to data processing systems. More specifically, the invention is concerned with arrangements for testing such systems.
One previously proposed arrangement for testing a data processing system is described in British Pat. Specification No. 1,536,147. In that specification, the internal data storage circuits of the system are connected together to form a plurality of serial shift register paths. Normally, the paths are disabled, preventing them from being shifted. However, in a diagnostic mode of operation, a selected one of the paths is enabled, allowing its contents to be shifted. This permits test patterns to be shifted serially into the storage circuits of that path, and the contents of these circuits to be shifted out for inspection.
A data processing system is usually constructed from a number of modules such as large-scale integrated circuit (LSI) chips. It may be desirable for each module to contain several shift register paths as described above. However, a problem which arises in this case is that the number of pins or terminals on the module is limited and hence there may not be enough pins available for all the necessary connections to the paths, for selection, control and data input/output. One object of the present invention is to alleviate this problem.